With a continuous development of display technology, great progresses are made in flat panel displays such as Light Emitting Diode (LED), Organic Light Emitting Diode (OLED), Plasma Display Panel (PDP), Liquid Crystal Display (LCD) and the like.
A typical OLED array substrate is taken as an example. It comprises a base substrate, and a Thin Film Transistor (TFT) and an organic electroluminescent device disposed on the base substrate. The TFT includes a gate, an active layer, a source and a drain, and the organic electroluminescent device includes a pixel electrode, a light emitting layer, and a cathode. The TFT is generally classified into a top gate type and a bottom gate type. Next, manufacturing processes for the TFT will be described by taking an array substrate having a top gate type TFT as an example. As shown in FIG. 1a to FIG. 1i, the manufacturing processes for the TFT comprise the following steps: firstly, forming a buffer layer 101 on a base substrate 100 as shown in FIG. 1a; then, forming a pattern of an active layer 102 on the buffer layer 101 as shown in FIG. 1b; next, sequentially depositing a gate insulating layer film and a gate film on the pattern of the active layer 102, and forming a pattern of a gate insulating layer 103 and a gate 104 through a patterning process, as shown in FIG. 1c; then, depositing an interlayer dielectric layer film, forming a via passing through the interlayer dielectric layer film through a patterning process to obtain a pattern of the interlayer dielectric layer 105, as shown in FIG. 1d; next, forming a pattern of a source 106 and a drain 107, the source 106 and the drain 107 being electrically connected with the active layer 102 respectively through the via passing through the interlayer dielectric layer film, as shown in FIG. 1e; then, depositing a passivation layer film and forming a via passing through the passivation layer film through a patterning process to obtain a pattern of a passivation layer 108, as shown in FIG. 1f; next, forming a pattern of a pixel electrode 109, the pixel electrode 109 being electrically connected with the drain 107 through the via passing through the passivation layer film, as shown in FIG. 1g; then, forming a pattern of a pixel defining layer 110 as shown in FIG. 1h; finally, forming a light emitting layer 111 and a cathode 112 as shown in FIG. 1i. 
In the above-described manufacturing processes for the OLED array substrate, masking shall be performed seven times in total and thus the manufacturing processes are rather complicated.